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Verilog Operators Operate On Several Data Types To Produce An Output
I Not All Verilog Operators Are Synthesible (Can Produce Gates)
I Some Operators Are Similar To Those In The C Language
I Remember, You Are Making Gates, Not An Algorithm (In Most Cases)
Verilog - Operators
Arithmetic Operators
I There Are Two Types Of Operators: Binary And Unary
I Binary Operators:
I Add(+), Subtract(-), Multiply(*), Divide(/), Power(**), Modulus(%)
//Suppose That: A = 4’b0011;
// B = 4’b0100;
// D = 6; E = 4; F = 2;
//Then,
A + B //Add A And B; Evaluates To 4’b0111
B - A //Subtract A From B; Evaluates To 4’b0001
A * B //Multiply A And B; Evaluates To 4’b1100
D / E //Divide D By E, Evaluates To 4’b0001. Truncates Fractional Part
E ** F //Raises E To The Power F, Evaluates To 4’b1111
//Power Operator Is Most Likely Not Be Synthesible
If Any Operand Bit Has A Value ”x”, The Result Of The Expression Is All ”x”.
If An Operand Is Not Fully Known The Result Cannot Be Either.
Verilog - Operators
Arithmetic Operators (Cont.)
Modulus Operator Yields The Remainder From Division Of Two Numbers
It Works Like The Modulus Operator In C
May Or May Not Be Synthesible
3 % 3; //Evaluates To 1
16 % 4; //Evaluates To 0
-7 % 2; //Evaluates To -1, Takes Sign Of First Operand
7 % -2; //Evaluates To -1, Takes Sign Of First Operand
Verilog - Operators
Arithmetic Operators (Cont.)
I Unary Operators
I Operators ”+” And ”-” Can Act As Unary Operators
I They Indicate The Sign Of An Operand
I.E., -4 // Negative Four
+5 // Positive Five
!!! Negative Numbers Are Represented As 2’s Compliment Numbers !!!
!!! Use Negative Numbers Only As Type Integer Or Real !!!
!!! Avoid The Use Of <Sss>’<Base><Number >In Expressions !!!
!!! These Are Converted To Unsigned 2’s Compliment Numbers !!!
!!! This Yields Unexpected Results In Simulation And Synthesis !!!
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